Spatial Memoization: Concurrent Instruction Reuse to Correct Timing Errors in SIMD Architectures.
Abbas RahimiLuca BeniniRajesh K. GuptaPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2013)
Keyphrases
- parallel architectures
- spatio temporal
- spatial information
- parallel algorithm
- spatial data
- spatial and temporal
- parallel processing
- spatial databases
- real time
- recognition errors
- array processor
- software reuse
- spatial location
- spatial reasoning
- cooperative learning
- spatial objects
- error analysis
- parallel implementation
- computer technology
- spatial relationships
- statistically significant