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A wire delay-tolerant reconfigurable unit for a clustered programmable-reconfigurable processor.
Richard B. Kujoth
Chi-Wei Wang
Jeffrey J. Cook
Derek B. Gottlieb
Nicholas P. Carter
Published in:
Microprocess. Microsystems (2007)
Keyphrases
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low cost
functional units
general purpose processors
delay tolerant
hardware implementation
high speed
single chip
real time
field programmable gate array
floating gate