Low chip area, low power dissipation, programmable, current mode, 10-bits, SAR ADC implemented in the CMOS 130nm technology.
Rafal DlugoszGunter FischerPublished in: MIXDES (2015)
Keyphrases
- low power
- nm technology
- single chip
- low cost
- power consumption
- high speed
- energy dissipation
- low power consumption
- analog to digital converter
- power dissipation
- signal processor
- mixed signal
- wide dynamic range
- cmos image sensor
- image sensor
- cmos technology
- power reduction
- vlsi architecture
- ultra low power
- vlsi circuits
- digital signal processing
- embedded systems
- digital camera
- logic circuits
- multi channel
- parallel processing