Low-Power 3D-PCB Stacking System Design and Validation by Automatic Voltage-Current Scalable Technique.

Ching-Hwa Cheng Jiun-In Guo

Published in: VLSI-DAT (2020)

Keyphrases

low power
single chip
low power consumption
logic circuits
low cost
power consumption
high speed
vlsi architecture
digital signal processing
power reduction
power dissipation
design process
gate array
energy dissipation
low complexity
high power
vlsi circuits
nm technology