Low power and area SHA-256 hardware accelerator on Virtex-7 FPGA.
Ali H. GadSeif Eldeen E. AbdalazeemOmar A. AbdelmegidHassan MostafaPublished in: NILES (2020)
Keyphrases
- field programmable gate array
- low power
- low power consumption
- hardware implementation
- low cost
- embedded systems
- reconfigurable hardware
- power consumption
- digital signal processing
- high speed
- hardware architecture
- fpga device
- parallel computing
- hardware design
- single chip
- image processing algorithms
- high power
- computing systems
- wireless transmission
- massively parallel
- signal processing
- efficient implementation
- vlsi architecture
- xilinx virtex
- vlsi circuits
- gate array
- hardware software
- power reduction
- cmos technology
- image sensor
- hardware and software
- computing platform
- high performance computing