A Constant Time Full Hardware Implementation of Streamlined NTRU Prime.
Adrian MarotzkePublished in: IACR Cryptol. ePrint Arch. (2020)
Keyphrases
- hardware implementation
- group signature scheme
- signal processing
- efficient implementation
- software implementation
- hardware architecture
- hardware design
- dedicated hardware
- high speed train
- field programmable gate array
- fpga implementation
- image binarization
- parallel architecture
- image processing algorithms
- pipeline architecture
- real time
- memory management
- processing elements
- fpga technology
- fpga device
- fractal image compression
- low cost