An FPGA implementation of future video coding 2D transform.
Ahmet Can MertErcan KalaliIlker HamzaogluPublished in: ICCE-Berlin (2017)
Keyphrases
- video coding
- fpga implementation
- high efficiency video coding
- motion compensated
- motion estimation
- bit rate
- rate distortion
- motion compensation
- video compression
- hardware implementation
- motion vectors
- video quality
- high definition
- rate control
- motion estimation and compensation
- video codec
- macroblock
- residual signal
- coding gain
- block based motion estimation
- motion compensated prediction
- computational complexity
- image quality
- field programmable gate array
- compression efficiency
- inter frame
- visual quality
- neural network
- real time
- machine learning
- rate control algorithm
- pattern recognition