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Design of a 1.8V 8-bit 500MSPS folding-interpolation CMOS A/D converter with a folder averaging technique.
Dongjin Lee
Jaewon Song
Jongha Shin
Sanghoon Hwang
Minkyu Song
Tad Wysocki
Published in:
ECCTD (2007)
Keyphrases
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analog to digital converter
circuit design
email
case study
low cost
high speed
mathematical model
power consumption
design principles
low power
design methodology
power supply
data conversion