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Formal verification of automotive embedded software.
Vassil Todorov
Frédéric Boulanger
Safouan Taha
Published in:
FormaliSE@ICSE (2018)
Keyphrases
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formal verification
embedded software
model checking
development projects
embedded systems
software architecture
model checker
bounded model checking
automated verification
symbolic model checking
sequence diagrams
real time
low cost
temporal logic