Implementation of area-efficient AES using FPGA for IOT applications.

Muttuluru Sreekanth R. K. Jeyachitra

Published in: Int. J. Embed. Syst. (2022)

Keyphrases

efficient implementation
hardware design
data sets
low cost
high speed
complexity analysis
neural network
signal processing
data acquisition
computationally expensive
software implementation
highly optimized
fpga hardware