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Efficient Implementation of Iterative Polynomial Matrix EVD Algorithms Exploiting Structural Redundancy and Parallelisation.

Fraser K. CouttsIan K. ProudlerStephan Weiss
Published in: IEEE Trans. Circuits Syst. I Regul. Pap. (2019)
Keyphrases
  • efficient implementation
  • active set
  • hardware implementation
  • efficient processing
  • significant improvement
  • map reduce
  • parallel architectures
  • highly parallel