A 16 Mb RRAM test chip based on analog power system with tunable write pulses.
Xiangchao MaHuaqiang WuDong WuHe QianPublished in: NVMTS (2015)
Keyphrases
- power system
- analog vlsi
- ieee bus
- optimal power flow
- smart grid
- economic dispatch
- transmission line
- circuit design
- power grid
- low cost
- load forecasting
- active power
- power generation
- power flow
- computational intelligence
- high speed
- electrical power
- reactive power
- data mining
- reduced order model
- electrical power systems
- mixed signal
- economic load dispatch