High speed DDR2/3 PHY and dual CPU core design for 28nm SoC.

Kevin Ho Tsung-Yi Chou Po-Kai Chen David J. Liou

Published in: VLSI-DAT (2012)

Keyphrases

high speed
low power
embedded systems
design process
design issues
learning algorithm
multi agent systems
software architecture
design patterns
hardware and software
engineering design
cmos technology