Low voltage low power techniques in design of zero IF CMOS receivers.
Yarallah KoolivandMohammad YavariOmid ShoaeiAli Fotowat-AhmadyPublished in: ICECS (2009)
Keyphrases
- low power
- cmos technology
- low voltage
- power consumption
- mixed signal
- single chip
- low cost
- high speed
- digital signal processing
- vlsi architecture
- low power consumption
- power dissipation
- power management
- logic circuits
- ultra low power
- design considerations
- vlsi circuits
- multi channel
- gate array
- parallel processing
- cmos image sensor
- nm technology
- power reduction
- analog to digital converter
- multi view
- delay insensitive