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28.1 A programmable 0.7-to-2.7GHz direct ΔΣ receiver in 40nm CMOS.

Mikko EnglundKim B. ÖstmanOlli ViitalaMikko KaltiokallioKari StadiusKimmo KoliJussi Ryynänen
Published in: ISSCC (2014)
Keyphrases
  • low cost
  • high speed
  • single chip
  • cmos technology
  • low power
  • power consumption
  • nm technology
  • silicon on insulator
  • general purpose
  • metal oxide semiconductor
  • delay insensitive
  • analog vlsi
  • real time