An Automata-Theoretic Approach for Model Checking Threads for LTL Propert.
Vineet KahlonAarti GuptaPublished in: LICS (2006)
Keyphrases
- model checking
- timed automata
- finite state
- finite state machines
- temporal logic
- bounded model checking
- automated verification
- formal verification
- model checker
- linear time temporal logic
- linear temporal logic
- partial order reduction
- temporal properties
- symbolic model checking
- formal specification
- reachability analysis
- transition systems
- verification method
- formal methods
- computation tree logic
- concurrent systems
- state space
- regular expressions
- process algebra
- asynchronous circuits
- finite automata
- planning domains
- formal languages
- knowledge representation
- knowledge based systems
- deterministic finite automaton
- deterministic automata
- binary decision diagrams