III-V-based low power CMOS devices on Si platform.
Shinichi TakagiD. H. AhnTakahiro GotowM. NoguchiK. NishiS.-H. KimM. YokoyamaC.-Y. ChangS.-H. YoonC. YokoyamaMitsuru TakenakaPublished in: ICICDT (2017)
Keyphrases
- low power
- power consumption
- low cost
- high speed
- low power consumption
- single chip
- embedded systems
- cmos technology
- mobile applications
- image sensor
- ultra low power
- vlsi architecture
- real time
- vlsi circuits
- high power
- delay insensitive
- digital signal processing
- wireless transmission
- logic circuits
- digital camera
- mobile devices
- mixed signal
- power reduction
- cmos image sensor
- nm technology
- gate array