Design of a pseudo-log image transform hardware accelerator in a high-level synthesis-based memory management framework.
Shahzad Ahmad ButtStéphane ManciniFrédéric RousseauLuciano LavagnoPublished in: J. Electronic Imaging (2014)
Keyphrases
- memory management
- high level synthesis
- operating system
- hardware implementation
- embedded systems
- design process
- image segmentation
- low cost
- parallel processing
- parallel architecture
- garbage collection
- memory hierarchy
- computer vision
- nearest neighbor
- computer systems
- probabilistic model
- real time
- user interface
- parallel computation
- information systems