Multiplier Truncation in FPGA Based CWT.
Yahya T. QassimTim R. H. CutmoreDavid D. RowlandsPublished in: ISCIT (2012)
Keyphrases
- hardware implementation
- hardware architecture
- field programmable gate array
- hardware design
- wavelet transformation
- efficient implementation
- wavelet transform
- discrete wavelet transform
- floating point
- application specific
- complex wavelet transform
- image processing algorithms
- signal processing
- interior point methods
- type ii
- hardware architectures
- video processing
- multiresolution
- computational complexity
- neural network
- video analysis
- denoising
- face recognition