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Power bumps and through-silicon-vias placement with optimised power mesh structure for power delivery network in three-dimensional-integrated circuits.
Cheoljon Jang
Jaehwan Kim
Byung-Gyu Ahn
Jongwha Chong
Published in:
IET Comput. Digit. Tech. (2013)
Keyphrases
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integrated circuit
power consumption
three dimensional
wireless sensor networks
low cost
neural network
artificial neural networks
signal processing