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FPGA-based ML adaptive accelerator: A partial reconfiguration approach for optimized ML accelerator utilization.
Achraf El Bouazzaoui
Abdelkader Hadjoudja
Omar Mouhib
Nazha Cherkaoui
Published in:
Array (2024)
Keyphrases
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maximum likelihood
field programmable gate array
parallel implementation
compute intensive
data sets
real time
neural network
information retrieval
case study
multiscale
general purpose
hardware implementation