Low Latency CMOS Hardware Acceleration for Fully Connected Layers in Deep Neural Networks.
Nick IlievAmit Ranjan TrivediPublished in: CoRR (2020)
Keyphrases
- low latency
- fully connected
- neural network
- high speed
- activation function
- real time
- highly efficient
- high throughput
- conditional random fields
- low cost
- scale free
- virtual machine
- stream processing
- fuzzy logic
- neural network model
- neural nets
- power consumption
- back propagation
- artificial neural networks
- genetic algorithm
- hidden markov models
- data acquisition
- hidden layer
- network architecture
- multilayer perceptron
- learning rate
- fuzzy neural network
- machine learning
- image segmentation