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Error analysis and inter-cell interference mitigation in multi-level cell flash memories.

Veeresh TaranalliHironori UchikawaPaul H. Siegel
Published in: ICC (2015)
Keyphrases
  • inter cell
  • error analysis
  • cell formation
  • layout design
  • least squares
  • cross ratio
  • error correction
  • manufacturing systems
  • associative memory
  • material handling
  • computer vision
  • linear programming
  • error estimates