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Derandomizing the Isolation Lemma and Lower Bounds for Circuit Size
Vikraman Arvind
Partha Mukhopadhyay
Published in:
CoRR (2008)
Keyphrases
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lower bound
upper bound
running times
high speed
branch and bound
lower and upper bounds
circuit design
worst case
upper and lower bounds
neural network
np hard
linear programming
memory requirements