Flexible line speed network packet classification using hybrid on-chip matching circuits.

Andreas Fiessler Sven Hager Björn Scheuermann

Published in: HPSR (2017)

Keyphrases

high speed
decision trees
classification accuracy
support vector
content addressable memory
analog vlsi
low cost
matching algorithm
transmission rate
computer networks
support vector machine
feature vectors
circuit design
feature extraction
network structure
network layer
switched networks
feature space