A 30Gbps 1.25pJ/b CMOS receiver analog front-end with low supply voltage.

Gaolei Zhou Luhong Mao Sheng Xie Chuang Min

Published in: IEICE Electron. Express (2021)

Keyphrases

analog vlsi
circuit design
high speed
mixed signal
cmos image sensor
low cost
power consumption
vlsi circuits
focal plane
low power
back end
high levels
analog to digital converter
floating gate
analog circuits
image sensor
genetic algorithm
multi channel
successive approximation
database