Low-Power Off-Chip Memory Design for Video Decoder Using Embedded Bus-Invert Coding.
Ni ZhouFei QiaoHuazhong YangHui WangPublished in: ISADS (2011)
Keyphrases
- low power
- high speed
- single chip
- low power consumption
- power dissipation
- low cost
- video decoder
- power consumption
- cmos technology
- mixed signal
- memory subsystem
- nm technology
- embedded systems
- ultra low power
- logic circuits
- digital signal processing
- cmos image sensor
- image sensor
- signal processor
- circuit design
- instruction set
- application specific
- multi channel
- analog to digital converter
- real time
- quality assessment
- coding scheme
- video streams