A SS-CNN on an FPGA for Handwritten Digit Recognition.
Jiong SiEvangelos A. YfantisSarah L. HarrisPublished in: UEMCON (2019)
Keyphrases
- handwritten digit recognition
- cellular neural networks
- hardware implementation
- convolutional neural network
- field programmable gate array
- high speed
- real time image processing
- real time
- verilog hdl
- fpga implementation
- hardware design
- hardware architecture
- single chip
- fpga hardware
- hardware architectures
- programmable logic
- parallel hardware
- digital signal
- low power consumption
- data sets
- gate array
- systolic array
- machine learning
- xilinx virtex
- software implementation
- case study
- low cost
- signal processing
- power consumption
- information retrieval
- computer vision
- website