A 900-MHz dual-conversion low-IF GSM receiver in 0.35-μm CMOS.

Shahrzad Tadjpour Ellie Cijvat Emad Hegazi Asad A. Abidi

Published in: IEEE J. Solid State Circuits (2001)

Keyphrases

high speed
low cost
low power
cmos technology
end to end
power supply
high levels
nm technology
neural network
high frequency
data acquisition
power consumption
parallel processing
circuit design
single chip
delay insensitive