Pipelined SHA-3 Implementations on FPGA: Architecture and Performance Analysis.
Harris E. MichailLenos IoannouArtemios G. VoyiatzisPublished in: CS2@HiPEAC (2015)
Keyphrases
- software implementation
- hardware architectures
- parallel architecture
- hardware implementation
- hardware architecture
- data flow
- systolic array
- real time
- hardware design
- efficient implementation
- dedicated hardware
- fpga technology
- fpga implementation
- neural network
- general purpose processors
- reconfigurable hardware
- high speed
- low cost
- management system
- parallel processing
- real time image processing
- field programmable gate array
- computational power
- fpga device
- software architecture
- pipelined architecture