A 12.77-MHz on-chip relaxation oscillator with digital compensation for loop delay variation.
Jiacheng WangWang Ling GohXin LiuJun ZhouPublished in: A-SSCC (2015)
Keyphrases
- phase locked loop
- high speed
- feedback loop
- power dissipation
- cmos technology
- mixed signal
- circuit design
- nm technology
- low cost
- differential equations
- low power
- limit cycle
- convex relaxation
- power consumption
- vlsi implementation
- programmable logic
- evolutionary algorithm
- analog vlsi
- cmos image sensor
- multipath
- real time
- probabilistic relaxation
- sigma delta
- control system
- objective function