Parallelization of Simulated Annealing Algorithm for FPGA Placement and Routing.
Rajesh EswarawakaPavan Kumar PagadalaB. Eswara ReddyTarun RaoPublished in: SocProS (1) (2015)
Keyphrases
- simulated annealing algorithm
- simulated annealing
- search algorithm
- genetic algorithm
- routing algorithm
- routing protocol
- hardware implementation
- field programmable gate array
- high speed
- test data generation
- routing problem
- parallel processing
- annealing algorithm
- low cost
- real time
- signal processing
- ad hoc networks
- convergence speed
- premature convergence
- evolutionary algorithm
- hardware design
- shortest path
- particle swarm optimization
- global optimization
- genetic algorithm ga
- mutation operator
- coarse grained
- multi objective
- lower bound
- differential evolution