Performance Evaluation of Pipelined Communication Combined with Computation in OpenCL Programming on FPGA.
Norihisa FujitaRyohei KobayashiYoshiki YamaguchiTomohiro UenoKentaro SanoTaisuke BokuPublished in: IPDPS Workshops (2020)
Keyphrases
- data acquisition
- communication systems
- real time
- field programmable gate array
- programming language
- hardware implementation
- pipelined architecture
- parallel computation
- high speed
- signal processing
- programming course
- low cost
- parallel programming
- parallel architecture
- information sharing
- parallel algorithm
- communication networks
- graphics processing units
- computer programming
- programming environment
- sensor networks
- software implementation
- fpga technology
- mobile devices