A Low Power and High Sensing Margin Non-Volatile Full Adder Using Racetrack Memory.
Kejie HuangRong ZhaoYong LianPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2015)
Keyphrases
- low power
- power dissipation
- logic circuits
- power consumption
- low cost
- high speed
- low power consumption
- image sensor
- single chip
- main memory
- high power
- real time
- cmos technology
- vlsi architecture
- vlsi circuits
- sensor networks
- digital signal processing
- gate array
- wireless transmission
- computational power
- file system
- ultra low power