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An Efficient Interpolation Hardware Architecture for HEVC Inter-Prediction Decoding.

Xianzhe JinKwangki Ryoo
Published in: J. Inform. and Commun. Convergence Engineering (2013)
Keyphrases
  • hardware architecture
  • hardware implementation
  • hardware architectures
  • low complexity
  • associative memory
  • field programmable gate array
  • case study
  • support vector machine
  • prediction error
  • processing elements