A Highly Efficient Domain-Programmable Parallel Architecture for Iterative LDPCC Decoding.
Ghazi Al-RawiJohn M. CioffiPublished in: ITCC (2001)
Keyphrases
- highly efficient
- parallel architecture
- low cost
- systolic array
- high level synthesis
- hardware implementation
- distributed memory
- image processing
- multithreading
- parallel processing
- synthetic aperture sonar
- real time
- shared memory
- sat solvers
- graph cuts
- motion estimation
- state space
- special case
- computational complexity