Neuromorphic Hardware Accelerator for SNN Inference based on STT-RAM Crossbar Arrays.
Shruti R. KulkarniDeepak Vinayak KadetotadShihui YinJae-Sun SeoBipin RajendranPublished in: ICECS (2019)
Keyphrases
- field programmable gate array
- low cost
- nearest neighbor
- real time
- hardware and software
- parallel hardware
- image processing
- bayesian networks
- probabilistic inference
- parallel implementation
- bayesian inference
- vlsi implementation
- dynamic bayesian networks
- training algorithm
- hardware implementation
- massively parallel
- belief networks
- computing power
- scheduling algorithm
- circuit design
- hardware architecture
- cellular automata
- social networks