ParaSplit: A Scalable Architecture on FPGA for Terabit Packet Classification.
Jeffrey FongXiang WangYaxuan QiJun LiWeirong JiangPublished in: Hot Interconnects (2012)
Keyphrases
- classification accuracy
- software implementation
- high speed
- support vector machine svm
- feature vectors
- classification method
- machine learning
- hardware design
- hardware implementation
- hardware architecture
- real time
- text classification
- real time traffic
- parallel architecture
- support vector machine
- feature space
- pattern recognition
- efficient implementation
- low cost
- decision trees
- feature selection
- hardware architectures