Design of Low Power Memristor Non-Volatile Dram Cell with Footer Switch.

Peter Bukelani Musiiwa Shyam Akashe

Published in: ICTCS (2016)

Keyphrases

low power
high speed
single chip
cmos technology
logic circuits
power consumption
low cost
low power consumption
vlsi architecture
digital signal processing
gate array
power dissipation
main memory
mixed signal
low voltage
power reduction
design methodology
vlsi circuits
image processing