FPGA Adders: Performance Evaluation and Optimal Design.
Shanzhen XingWilliam W. H. YuPublished in: IEEE Des. Test Comput. (1998)
Keyphrases
- optimal design
- programmable logic
- field programmable gate array
- hardware implementation
- water supply
- high speed
- structural design
- digital signal
- real time image processing
- signal processing
- real time
- hardware architecture
- low cost
- fpga hardware
- multiple valued
- bit parallel
- verilog hdl
- parallel hardware
- information systems
- data sets
- embedded systems