A Mid-Texturing Pixel Rasterization Pipeline Architecture for 3D Rendering Processors.
Woo-Chan ParkKil-Whan LeeIl-San KimTack-Don HanSung-Bong YangPublished in: ASAP (2002)
Keyphrases
- pipeline architecture
- computer graphics
- texture mapping
- hardware implementation
- frame buffer
- parallel algorithm
- parallel processing
- input image
- high fidelity
- image based rendering
- image synthesis
- high quality
- graphics hardware
- computer vision
- neighboring pixels
- virtual environment
- multiprocessor systems
- high end
- real time rendering
- computer generated images
- pixel values
- photorealistic
- pixel wise
- virtual reality
- infrared
- d objects
- pattern recognition
- neural network
- human perception
- real time
- efficient implementation
- d scene
- single processor
- signal processing
- image processing