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A 19GHz, 250pJ/bit non-linear BPSK demodulator in 90nm CMOS.
José Gabriel Macias-Montero
H. Yan
Atef Akhnoukh
Leo C. N. de Vreede
John R. Long
José María López-Villegas
John J. Pekarik
Published in:
ESSCIRC (2009)
Keyphrases
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clock gating
power consumption
nm technology
low power
high speed
random access memory
power dissipation
cmos technology
communication systems
silicon on insulator
power reduction
delay insensitive
metal oxide semiconductor
bit error rate
low voltage
analog vlsi