Login / Signup
A Systematic Methodology for Parasitic Capacitance Estimation and Validation of Multichip Modules.
Ripun Phukan
Shin-Yu Chen
Rolando Burgos
Published in:
IEEE Trans. Ind. Electron. (2024)
Keyphrases
</>
high speed
qualitative and quantitative
information retrieval
estimation process
robust estimation
parameter estimation
design methodology
estimation algorithm
maximum likelihood estimation
high frequency
unit length
functional modules
databases
least squares
image processing
search engine
neural network