Core architecture optimization for heterogeneous chip multiprocessors.
Rakesh KumarDean M. TullsenNorman P. JouppiPublished in: PACT (2006)
Keyphrases
- multithreading
- loosely coupled
- vlsi implementation
- parallel architecture
- management system
- analog vlsi
- low cost
- real time
- optimization problems
- optimization algorithm
- global optimization
- optimization process
- neural network
- heterogeneous environments
- parallel implementation
- shared memory
- optimization method
- high speed
- design considerations
- distributed architecture
- single chip
- level parallelism
- multi objective
- host computer
- cmos image sensor
- embedded dram