Querying Trajectories through Model Checking based on Timed Automata.
Diego V. Simões S.Henrique VianaNicolas MarkeyJosé Antônio Fernandes de MacêdoPublished in: SBBD (Short Papers) (2012)
Keyphrases
- timed automata
- model checking
- temporal logic
- reachability analysis
- formal specification
- model checker
- temporal properties
- finite state
- formal verification
- finite state machines
- partial order reduction
- symbolic model checking
- verification method
- automated verification
- transition systems
- query language
- theorem prover
- epistemic logic
- bounded model checking
- concurrent systems
- process algebra
- computation tree logic
- pspace complete
- reactive systems
- asynchronous circuits
- binary decision diagrams
- machine learning
- planning domains
- web services
- alternating time temporal logic
- knowledge base