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A networks-on-chip emulation/verification framework.
Peng Liu
Yangfan Liu
Bingjie Xia
Chunchang Xiang
Xiaohang Wang
Kejun Wu
Weidong Wang
Qingdong Yao
Published in:
Int. J. High Perform. Syst. Archit. (2011)
Keyphrases
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theoretical framework
high speed
conceptual framework
data sets
databases
genetic algorithm
low cost
main contribution
model checking
programmable logic