A High speed, Low Voltage to High Voltage Level Shifter in Standard 1.2V 0.13μm CMOS.

Bert Serneels Michiel Steyaert Wim Dehaene

Published in: ICECS (2006)

Keyphrases

low voltage
high speed
high voltage
low power
cmos technology
design considerations
power line
power management
operating conditions
real time
random access memory
normal operation
partial discharge
neural network
power consumption
spatially varying