Login / Signup
Exploiting the on-chip inductance in high-speed clock distribution networks.
Yehea I. Ismail
Eby G. Friedman
José Luis Neves
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2001)
Keyphrases
</>
high speed
distribution networks
low power
frame rate
lead time
real time
evolutionary algorithm
low cost
data sets
high speed networks