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High-speed assembly FFT implementation with memory reference reduction on DSP processors.
Yiyan Tang
Yuke Wang
Jin-Gyun Chung
Sang Seob Song
Myoung-Seob Lim
Published in:
ICECS (2004)
Keyphrases
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high speed
signal processing
low power
real time
image processing
pattern recognition
frequency domain
parallel processing
parallel computers
digital signal processing
memory management
instruction set
fourier transformation
memory subsystem
texas instruments