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A 2.5-3.125-Gb/s quad transceiver with second-order analog DLL-based CDRs.

Abdulkerim L. CobanMustafa H. KorogluKashif A. Ahmed
Published in: IEEE J. Solid State Circuits (2005)
Keyphrases
  • higher order
  • high speed
  • signal processing
  • high order
  • analog vlsi
  • genetic algorithm
  • analog circuits
  • image processing
  • lower bound
  • circuit design
  • fourth order